Analog Layout Engineer

채용제목 Analog Layout Engineer (지원마감) 회사소개 Fabless 반도체 중견기업 업무내용/자격요건 담당직무AnalogICLayout(자격요건)1)전문대졸이상2)관련경력:3년이상3)Amplifier,ADC,DAC,Bandgap회로,LDO,OPAMP,Chargepump회로,SerdesIC등의 설계및프로젝트유경험(우대사항)1)CustomDesignLayoutCADtool:Opus,Hspice,Hsim2)Top-DownDesigntool:Verilog,Astro,Virtuoso3)Others:Cadence,Calibre등(전형절차)서류전형/1차실무면접/2차최종면접(제출서류)국문이력서?자격요건1)전문대졸이상2)관련경력:3년이상3)Amplifier,ADC,DAC,Bandgap회로,LDO,OPAMP,Chargepump회로,SerdesIC등의 설계및프로젝트유경험(우대사항)1)CustomDesignLayoutCADtool:Opus,Hspice,Hsim2)Top-DownDesigntool:Verilog,Astro,Virtuoso3)Others:Cadence,Calibre등(전형절차)서류전형/1차실무면접/2차최종면접(제출서류)국문이력서?전형절차서류전형/1차실무면접/2차최종면접(제출서류)국문이력서?제출서류국문이력서?