Senior Design Engineer

Position can be worked from Pleasanton, CA office or San Jose, CA office

RESPONSIBILITIES

• Participate in defining chip architecture by analyzing competitors' flash operations and developing proprietary flash design technologies to meet marketing-defined specifications.
• Design analog circuits, including charge pumps, reference voltage generators, sense amplifiers, and x/y core circuits to achieve low power and high-speed flash memory performance.
• Model digital and analog circuits using Verilog language and conduct full-chip verification with Verilog simulators.
• Define test modes to facilitate easy debugging from process, design, and product engineering perspectives, while also addressing production concerns.
• Identify and resolve issues through rigorous simulation, testing, and professional judgment.
• Collaborate with layout designers to support and guide product engineers in testing and debugging design tasks.

EDUCATION EXPERIENCE AND SKILLS REQUIRED

• BSEE(MSEE) degree or equivalent. Several years of experience in flash memory and/or other related fields is plus.
• Familiar with Unix/Linux, HSPICE, logic simulations, and Cadence Design & Verification tools is a plus.