ASIC/RTL Design Engineer-Senior

Overview:
TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories, graphics processors, motherboard chip sets, and a variety of components used in consumer electronics goods.
Job Title: ASIC/RTL Design Engineer - Senior
Work Location: Santa Clara, CA, 95054
Duration: 12 Months
Work Type: Contract
Job Type: Onsite
Job Description:
KEY RESPONSIBILITIES:

• Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements.
• Collaborate with architecture and hardware teams to understand the requirements.
• Work with verification and physical design teams to achieve high quality design and successful tape out.
• Design and implement logic functions that enable efficient test and debug
• Participate in silicon bring-up for features owned.
• Contribute in cross-functional teams to solve novel problems across multiple functional areas in development of required features.
• Implement automation to increase design team efficiency.

PREFERRED EXPERIENCE:

• 5-6+ years' experience
• Must have proven track record of ASIC design on several production tape-outs.
• Experience in Designing RTL block for an SOC.
• Experience in integrating ASIC IP into an SOC.
• Experience with Arm architecture and APB, AXI, CHI protocols.
• Experience with synthesis, static timing analysis & optimizations.
• Experience with design involving Interconnects.
• Experience writing timing constraints and exceptions.
• Experience with automation using scripting techniques such as PERL, Python or Tcl
• Ability to develop clear and concise engineering documentation.
• Experience in Power-saving techniques.
• Ability to organize and present complex technical information.
• Strong verbal and written communication skills

Top 3 skills:

• Good understanding of SystemVerilog, analysing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have

TekWissen® Group is an equal opportunity employer supporting workforce diversity.