Position Details:
Job ID: (phone number removed)
Title: FPGA Design Engineer
Duration: 12 months
Location: Sunnyvale, CA
Pay Rate: $75 - $85/ Hr. on W2
Summary:
The Meta Reality Labs team is building products that make it easier for people to connect with the ones they love most. As a FPGA Design Engineer within the multidisciplinary Metaverse Prototyping Team, you will employ your expertise in problem solving and prototyping to accelerate product development across Meta’s hardware organization. You will collaborate with teams within Hardware Engineering, Research and Development, and Industrial Design. These projects cover a wide variety of technical challenges unique to Meta’s hardware portfolio, including Oculus, Portal, and beyond. The team is responsible for rapidly building and iterating polished high-fidelity prototypes and development platforms that bring new ideas to life by expressing design intent and user experience - using the best and most appropriate tools and techniques for the task. We are seeking a FPGA Design Engineer who has a passion for working across disciplines (EE, FW/SW) to turn early cutting-edge concepts and technologies into reality. As an FPGA Design Engineer, you will be responsible for design of new concepts, technologies and product development.
Must Haves:
- Partner with Design, Engineering and Research teams to identify and solve complex design and technological challenges.
- Designing, simulating, prototyping, debugging and testing of embedded systems which combine electronics, mechanics, optics and software with end-to-end ownership of product design throughout early product development.
- Collaborating in a team environment with cross-functional teams such system engineering, architecture, product design, NPI and research.
- Ability to execute multiple streams of work simultaneously and independently balance and prioritize project workload to ensure success against timeline constraints.
- RTL development and testing for FPGA targets/platforms to support rapid prototyping.
- Assist with algorithm analysis, verification and improvement.
- Direct contingent/contract design and test resources.
- Develop component and system level performance specifications.
Minimum Education/Experience:
- BS Electrical Engineering (EE), Computer Engineering (CE) or Computer Science (CS) or equivalent experience.
- 8+ years of end-to-end FPGA design experience (RTL, Simulation, Implementation, Hands on bring-up and debug).
- Experience with commercial HDL simulators (Modelsim/Questa).
- Experience with Verilog and SystemVerilog.
- Experience with digital circuit design and various communications protocols such as I2C, UART, SPI, I2S, USB, MIPI, PCIe, etc.
- Experience with board level testing (oscilloscope, logic analyzer).
- Collaboration and communication skills.
- Demonstrated domain knowledge in compute & systems development, proven track record in building advanced technology & product development.
Regards,
Shrish Singh
Senior Technical Recruiter | Operations
Cell: (phone number removed)
360 Mt. Kemble Avenue, Suite 2000 Morristown, NJ 07960
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