Senior Physical Design Engineer

Job Details for your reference:

Job Title: Principal Analog Mixed-Signal Design Engineer ( RF/SiPho/TIA/CMOS/SiGe)

Work Location: Westlake Village, CA

Duration: Full Time

Shift Schedule: 2 days Onsite and 3 days Remote

What You Can Expect

• Seeking an RF and Analog Design Engineer to contribute to the development of multi-tens of GHz Transimpedance amplifiers TIAs.
• These optical interface chips are tightly coupled with our high-performance equalizers.
• The results of our innovative designs have made our TIAs best in class for coherent long-haul and metro systems as well as PAM4 data center systems.

In this role you will be responsible for:

• Active circuit design as well as technical leadership.
• Design leading edge transimpedance amplifier design, primarily in Silicon Germanium (SiGe) BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) technology, where circuit performance will need to transcend beyond industry leading products.
• Develop transmission line structures and other millimeter wave structures to enable higher performance than would normally be achievable.
• Design of hi-performance broadband analog circuits for optical front-end receivers.
• Design of various other analog circuits including linear regulators, AGC loop, current/voltage sensors, bandgaps etc.
• Develop microarchitecture of major circuit blocks and guide team of designers to implement them. Work with various technologies including SiGe BiCMOS and CMOS.
• Work with other functional groups to facilitate post-silicon validation, qualification, transition to mass production, and customer support.

What We're Looking For

• Proven experience in IC design including chip tape-out AND lab evaluation of receiver design working in the industry).
• Solid experience in Designing
• Using EDA CAD tools
• Performing Analog Custom Layout
• Experience in measuring IC performance and debug of design to correlate simulations to measurements
• Deep understanding of fundamentals, including:
• Detailed transistor level design
• Device physics
• Control/Feedback loop stability analysis
• Direct project experience in at least one of the following areas is a plus:
• AGC loop design
• High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/Client)
• Experience in CTLE design
• Experience in Package-System integration issues desired
• Project experience in using different technologies. (SiGe BiCMOS is a plus)
• A team-player
• Experience in the following is a strong plus:
• Overseeing and mentoring junior circuit designers
• Experience as chip lead with success in silicon
• Experience in taking chips to mass production
• Ability to translate chip level specifications into architecture
• Strong communication, presentation and documentation skills.

Education/ Qualification:

• Bachelor's degree in Electrical Engineering in the areas of design of high-performance RF/Analog Receiver/TIA design and 10 - 15 years’ experience Or MSc EE Or PhD EE with 5+ years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design.