Senior Staff R&D Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly skilled and passionate engineer with a deep understanding of software engineering principles and system design. You excel in building scalable and efficient platforms and have a knack for developing, updating, and maintaining code frameworks. Collaboration is your forte, and you thrive in cross-functional team environments where you can define and execute project goals. Your expertise in Digital IP, design constraints, and timing exceptions, combined with your knowledge of DFT methodologies, makes you a valuable asset to any team. You are proficient in C/C++ and TCL programming languages and have experience with tools like Valgrind and GDB for debugging. Your problem-solving skills are top-notch, and you are always willing to go the extra mile. As a team player with excellent written and verbal communication skills, you are adept at working with direct customer-facing roles and aligning multi-member software teams towards business goals and priorities.

What You’ll Be Doing:

1. Following design principles of software engineering and systems to build features that improve platform scalability and efficiency.
2. Developing, updating, and maintaining the code framework for constraint modeling.
3. Collaborating with cross-functional teams to define and execute project goals.
4. Understanding Digital IP with a focus on design constraints and timing exceptions.
5. Applying DFT methodologies to enhance the design process.
6. Utilizing your proficiency in C/C++ and TCL programming languages, as well as tools like Valgrind and GDB for debugging.

The Impact You Will Have:

1. Enhancing platform scalability and efficiency through innovative feature development.
2. Streamlining the design process with robust code frameworks for constraint modeling.
3. Driving project success through effective collaboration with cross-functional teams.
4. Improving the accuracy and reliability of Digital IP designs by focusing on constraints and timing exceptions.
5. Advancing DFT methodologies to ensure high-quality design outputs.
6. Contributing to the overall success and technological innovation at Synopsys.

What You’ll Need:

1. Deep understanding of Digital IP with a focus on design constraints and timing exceptions.
2. Proficiency in DFT methodologies.
3. Strong programming skills in C/C++ and TCL.
4. Experience with Valgrind and GDB for debugging.
5. Excellent problem-solving abilities and attention to detail.

Who You Are:

1. A high-energy individual willing to go the extra mile.
2. A team player with excellent customer-facing skills.
3. Effective written and verbal communicator.

The Team You’ll Be A Part Of:

You will be part of a dynamic and collaborative team focused on driving technological advancements in chip design and verification. Our team values innovation, teamwork, and continuous improvement, working together to achieve common goals and deliver exceptional results.

The Salary Range for this position is $135000-$203000.