Senior Analog/ RF Layout Design engineer Required for Tape Out for TSMC 28 nm technology. The assignment Designing of various Analog Bocks ensuring desired specifications/required quality and qualifying all layout verification checks. Top Level routing and integration of the designed blocks/ sub blocks, after creating IO ring. Performing all the necessary steps required for Tape Out like creation of Dummies etc. Layout Verifications for all stages of development. Creation of closure report if necessary. Required knowledge and skills Candidate applying for this position should be an expert in designing Analog/RF layouts. Should have prior experience for tape out in TSMC 28nm technology. Should be aware of all the layout related effects for this technology. Should be able to help Circuit Design Engineer take necessary decision based on his layout expertise for this technology. Should have the required knowledge for Virtuoso GXL, and all the steps/ layout verifications required for GDS tape out.