Digital Verification Engineer – East Midlands – Semiconductors – Great package
A Digital Verification Engineer with 5+ years Semiconductor Industry experience including the use of standardized methodologies (UVM ideally), SystemVerilog and Cadence simulation Tools will become part of a leading Semiconductor Company bringing high speed and energy efficient chip-chip link solutions to the electronic industry.
Working closely with design engineers in verification and validation of circuit designs; the successful Digital Verification Engineer will utilize the latest techniques, tools and technologies; whilst also developing design verification methodologies and participating in design reviews.
The Digital Verification Engineer will bring most of the following:
- An Electronics related Degree.
- 5+ years Semiconductor Industry experience.
- Expertise in digital design verification using UVM.
- Experience in simulating mixed signal designs with real-number Verilog behavioural models.
- Experience with SystemVerilog Assertions (SVA) and formal verification.
- Good knowledge of metric driven verification including test planning.
- Knowledge of Cadence simulation tools.
- Some familiarity with high level protocols such as PCIe, USB.
If you are a Digital Verification Engineer seeking your next career challenge with a generous salary, hybrid working and numerous benefits – apply now for full details.
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