Senior High Speed Chip Validation Engineer

Job Description:

SOC validation engineers employ silicon evaluation platforms, software, and a range of test equipment to evaluate the functionality and design of products, programs, and tools. They work before the SOC enters the production phase and collaborate with design teams to validate their designs. The primary responsibility of a validation engineer is to ensure that a product conforms to its specifications.

Some of the Responsibilities Include:

• Develop test plans by creating validation strategies that align with specifications, architects' input, and customer scenarios.
• Define test methodologies to establish and enforce standards and policies for validation and testing. Work with high-speed serial I/O interfaces, including PCIE Gen1-5, and peripheral interfaces like SPI and I2C.
• Document processes by creating technical manuals and maintaining comprehensive documentation of validation activities and results.

Basic Qualification

• A Bachelor’s or Master's degree or higher in Electrical Engineering (EE), Electronic and Computer Engineering (ECE), or Computer Science (CS) is required.
• Candidates should have 5-10+ years of experience in SOC/ASIC/FPGA validation.
• They must be knowledgeable about high-speed serial interface analog building blocks, protocols, specifications, and test methods.
• Proficiency in using High Bandwidth oscilloscopes, BERT, logic analyzers, and an understanding of probing techniques is also necessary.

Preferred qualifications

• BS/MS/ME in Computer Science, Electrical Engineering, or related field
• Writing Python/C++ code to automate test procedures
• ERL, MATLAB) to develop automation scripts is a plus.
• Experience in Analog IP Characterization (SerDes, PLL, DDR) is desirable