ASIC Design for Testability Engineer

Company:  APR Consulting
Location: Linthicum Heights
Closing Date: 03/11/2024
Hours: Full Time
Type: Permanent
Job Requirements / Description

An aerospace client is looking for an ASIC Design for Testability Engineer who will become part of the Digital Technologies department, which specializes in product designs for a variety of applications from undersea to outer space.

Location: Linthicum, MD 21090

Position: ASIC Design for Testability Engineer

Pay Rate : $65/hr. on W2, depending on experience

Duration : 12 months or longer

***Work is 100% on-site - no remote work available.***

RESPONSIBILITIES:

The company is seeking an ASIC DFT Engineer to join the team of highly qualified, diverse individuals in Digital Technologies.

  • Qualified applicants will become part of the Digital Technologies department, which specializes in product designs for a variety of applications from undersea to outer space.
  • The individual will be responsible for DFT (Design for Testability) aspects of ASIC Design.
  • Successful candidates will have a thorough understanding of digital design concepts and have prior experience with the ASIC development process.
  • Must be knowledgeable in VHDL, Verilog, or SystemVerilog RTL coding and be highly proficient in DFT methodologies.
  • This candidate will have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the goals.

REQUIREMENTS:

  • U.S. citizenship is required.
  • Bachelor's degree in Electrical Engineering or a related discipline and a minimum of 9+ years of relevant experience.
  • Experience in the full product life cycle of ASIC Design.
  • Experience with Cadence, Mentor and/or Synopsys test insertion and ATPG tools.
  • Experience with hierarchical scan testing, IEEE-1500 and/or IEEE-1687, test compression, JTAG IEEE-1149.1 and IEEE-1149.6 (AC JTAG)
  • Experience with memory BIST and logic BIST.
  • Experience generating test patterns and analyzing and debugging test failures.
  • Experience working with test engineers to implement ATPG vectors on tester hardware.
  • Proficiency in HDL (VHDL/Verilog/SystemVerilog) and scripting languages such as Tcl, Python or Perl.
  • Effective communication and presentation skills and high proficiency in technical problem-solving.
  • Knowledge of Synthesis, P&R, and Static Timing Analysis would be a plus.

About our client :

Our client is a world leader and premier innovator in aerospace, with over 100,000 top talent employees providing the most advanced products and technologies in the industry. With numerous awards and recognitions, they offer their employees continuous growth, learning, and development.

About APR:

Since 1980 APR Consulting, Inc. has provided professional recruiting and contingent workforce solutions to a diverse mix of clients, industries, and skill sets nationwide.

We are an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law.

Don't miss out on this amazing opportunity! If you feel your experience is the match for this position please apply today and join our team. We look forward to working with you!

Apply Now
Share this job
APR Consulting
  • Similar Jobs

  • ASIC Design for Testability Engineer

    Linthicum Heights
    View Job
  • ASIC Design for Testability Engineer

    Baltimore
    View Job
  • ASIC Design for Testability Engineer

    Linthicum Heights
    View Job
  • Staff Digital ASIC Circuit Design Engineer

    Linthicum
    View Job
  • Senior Principal Digital Engineer (FPGA and ASIC Design)

    Baltimore
    View Job
An error has occurred. This application may no longer respond until reloaded. Reload 🗙