Analog and Mixed-Signals IC Design Engineer | MyDentalWig

Company:  Mydentalwig
Location: Lancaster
Closing Date: 18/10/2024
Salary: £100 - £125 Per Annum
Hours: Full Time
Type: Permanent
Job Requirements / Description

Analog and Mixed-Signals IC Design Engineer

Company Description:

We are a data-driven dental chip manufacturing company with high growth potential, looking for a talented analog and mixed-signals IC engineer to help us ensure quality, efficiency, and create top-of-the-line MyDentalWig devices and products.

We are looking for Analog and Mixed-Signal IC Design Engineer who are interested in architecting and implementing innovative solutions with high energy-efficiency and compact silicon footprint and who thrive with the autonomy to propose creative approaches to problems.

The Analog and Mixed-Signal IC Design Engineer will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification.

  • Define and implement innovative and optimal analog and mixed signal circuit architectures and transistor-level circuit solutions to achieve a variety of challenging noise, mismatch, distortion, power consumption, and cost requirements.
  • Defines verification plan for a portion of IP or chip and runs complex simulations and analyses (e.g., power, performance, linearity, yield) on designs.
  • Designs, programs, and runs complex tests and reviews tests of other team members; ensures bugs and other issues are identified and appropriately analyzed.
  • Minimum 1 year of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC and Class D audio amplifier, high speed PHY & SERDES) with a successful track record of silicon validation.
  • Minimum 3 months experience of application of technical skills outside of the classroom (examples: laboratory, research, extracurricular project teams, open source contributions, volunteering, personal projects or prior internship/work experience).
  • The ideal candidates are people who get excited about building things, are highly analytical, and enjoy tackling new problems regularly.

Preferred qualifications:

  • Skills in scripting and automation for complex simulation scenarios.
  • Experience in lab testing of high-precision analog and mixed-signal ICs.
  • Functional modeling experience and logic verification with Verilog AMS and SystemVerilog.
  • Experience in design and layout with advanced CMOS FinFET technologies.
  • Experience with design for high-volume production.

Pay Transparency:

Based on California law, the following details are for California individuals only:

California base salary range: $100,000—$123,000 USD

For full-time employees, your compensation package will include two major components: salary and vested stock options. Guidance on salary for this role will be determined according to the level you enter the organization (with the ability to gain more through time as you contribute).

Full-Time Employees are eligible for equity and benefits listed below in addition:

  • cashless stock options
  • Climbing the ladder fast
  • 401K
  • Health- Vision and Dental when company reaches 10 full-time staff

Schedule:

  • Day shift
  • Monday to Friday

Ability to Relocate:

  • Lancaster, CA 93536: Relocate before starting work (Required)

Apply Online

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