Engineer I - Software

Company:  Penn Foster
Location: San Jose
Closing Date: 04/11/2024
Salary: £150 - £200 Per Annum
Hours: Full Time
Type: Permanent
Job Requirements / Description

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Job Description:

The Microchip FPGA Software Engineering team delivers a comprehensive software suite for designing Microchip's FPGAs and managing the entire design flow from entry, to synthesis, through place-and-route, timing, power analysis, simulation, debug and programming. Within the Software organization, the Application Frameworks and Infrastructure group is responsible for developing data representations of the customer's FPGA design through its various stages of compilation - from RTL to synthesized gates, placement and routing - as well as the mechanisms to analyze that information. We are also responsible for developing the overall Integrated Design Environment (IDE) used to create the FPGA design, define its constraints and manage the entire Electronic Design Automation (EDA) flow. Microchip's FPGA IDE software is distributed commercially to a wide range of customers.

The Application Frameworks and Infrastructure group is looking for a highly motivated individual to be part of the team to design the next generation software for Microchip's FPGAs. In that role, you will be part of the team working on improving/redesigning the customer design gate-level representation with respect to the overall robustness and scalability (run-time and memory) to support very large FPGA devices. You will work on managing the user design database as it gets through the various design compilation steps, implementing FPGA architecture specific Design Rules Checks (DRCs) and netlist transformations. The new user design database and FPGA architecture specific code will be architected and designed with modularity and maintenance in mind as it will be used in Microchip's new FPGA IDE platform for the next 10+ years.

Responsibilities:

  • Work on large gate level netlist data structures development and optimization.
  • Work on FPGA gate level netlist compilation flows development and maintenance.
  • Profile the tool chain and implementing runtime/memory optimizations.
  • Create unit tests to improve developer regressing suites.

Requirements/Qualifications:

  • BS or MS in Computer Science or related field.
  • 0-2 years relevant experience.
  • Good knowledge and ability in C++, as well as understanding of data structures representing gate level netlists.

Preferred Qualifications:

  • Basic understanding of FPGA architectures.
  • Effective communicator and creative problem-solver.
  • Ability to work in a fast-paced, demanding, dynamic environment.
  • Experience with shell scripting languages (Perl, Python, Bash, TCL).
  • Experience with software development in a Linux and Windows environment.

Travel Time: 0% - 25%

Physical Attributes: Feeling, Handling, Hearing, Seeing, Works Around Others

Physical Requirements: 80% sitting, 10% walking and 10% standing, 100% indoors

Pay Range: The expected base salary range for this position, if filled in California, is $64,480 - $128,000, dependent on specific skills and work experience. We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature.

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

#J-18808-Ljbffr
Apply Now
Share this job
Penn Foster
An error has occurred. This application may no longer respond until reloaded. Reload 🗙