DFT Engineer

Good understanding on any MBIST methodology, knowledge on LV/Tessent Shell/Embedded -MBIST
MBIST pattern generation and simulation
Understanding EDT scan compression Methodology and very good hand on experience for on designs with compression.
Very good understanding of hierarchical scan design, should have previous experience working on such designs
ATPG pattern generation and Simulation.
Basic understanding of STA, for debugging SDF based simulations is a plus.
Understanding of ATE test methodologies and performing diagnostic on ATE failures
ATPG DRC debug and coverage analysis