RISC-V Formal Verification Engineer (Contractor)

Company:  CV Library
Location: San Francisco
Closing Date: 09/11/2024
Salary: £200 - £250 Per Annum
Hours: Full Time
Type: Permanent
Job Requirements / Description

Job Description





RISC-V International is looking for a Sail Developer to help develop the RISC-V Formal Model codebase. Part of the acceptance criteria for ratification of a RISC-V hardware specification includes the completion of the formal model deliverables for the extension seeking ratification. RISC-V has chosen Sail from the University of Cambridge as its formal modeling . RISC-V Sail both uses and depends upon the associated tools including the simulator generator.





This role will develop the Sail formal model support for the RISC-V ISA extensions and augment the Sail infrastructure to support formal model development; work with the RISC-V ISA specification document creation so that the formal model is consistently integrated into the specification and in the formal model files. Collaborate with the RISC-V Staff, with the Task Groups, Development Partners, and Cambridge Sail staff.





The expected salary range will be $12,000 to $15,000 per month based on experience.





Key responsibilities include:





Develop Sail Formal Model code for extensions and upstream to the RISC-V Sail repository





Develop assembly tests to demonstrate proper Sail implementation of the extension and/or feature as compared to the text of the specification.





Enhance Sail infrastructure (e.g. simulator generator functionality) to support the RISC-V Formal Model





Work with the RISC-V Sail ecosystem including: the RISC-V Sail maintainer, Cambridge Sail staff, RISC-V Architectural Tests efforts, RISC-V Task Groups, and RISC-V Development Partners to develop the RISC-V Sail Formal Model.





Work with the RISC-V Sail repository maintainer to provide priorities and oversight of RISC-V Sail development throughout the ecosystem





Maintain the RISC-V Sail Formal Model community including mailing lists, informational meetings, and developer training





Communicate status to the RISC-V Task Group Chairs and inform the greater RISC-V community of updates as appropriate



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