Pre-Silicon Functional Verification Engineer

Overview:

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming, and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance.

Responsibilities:

THE ROLE:
We are looking for an adaptive, self-motivated design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

1. Perform pre-Silicon Functional Verification of next high-performance Microprocessor designs.
2. Develop and execute on verification test plans at various levels of design hierarchy including unit and full-chip environments.
3. Develop high-level testbench components including stimulus drivers, BFMs, behavioral models, monitors, and checkers.
4. Develop, simulate and debug directed and random stimulus and assembly level tests to find bugs in the microprocessor design; verify the functionality and verify conformance to the ISA.
5. Find bugs in the design and work with RTL writers to resolve all simulation failures and discrepancies.
6. Develop and analyze assertions and coverage terms. Participate in technical reviews of the specifications, design, and test plans. Identify and address areas of concern to meet design quality objectives.
7. Develop tools, infrastructure, processes, and flows to enable functional verification.
8. Document test plans and testbench component plans and drive reviews with peers and stakeholders.
9. Maintain and improve existing functional verification infrastructure and methodology.
10. When presented with Silicon issues, replicate in the pre-silicon environment and provide debug expertise to root cause the issue and ensure complete validation.
11. Contribute towards and drive as needed pre-silicon and/or post-silicon verification of complex architectural and microarchitectural features.
12. Drive project deliverables and dependencies with cross-site Architects, RTL writers, and Physical Design engineers.
13. Independently develop quality, timely, and cost-effective solutions.

EXPERIENCE:

1. Experience in scripting (e.g. Perl or Python or Ruby).
2. Experience in hardware/logic simulators (e.g. VCS or NC-Verilog).
3. Experience in debug tools or waveform viewers.
4. Experience in Verification (e.g. Specman or System Verilog or UVM).
5. Experience in Formal verification tools and techniques.
6. Experience in modeling hardware designs in emulators or FPGAs.
7. Documented and demonstrable expertise in at least three of the following either academic or professional setting:
1. Modern computer architecture including processor pipeline and memory hierarchy.
2. Hands-on work in C++ programming for either hardware modeling or testbench development or projects of similar scope and complexity.
3. Logic design and representing the same in HDL (e.g. Verilog or VHDL).
4. Assembly programming and Instruction Set Architecture of a modern microprocessor.
5. Hardware Verification methodology and techniques such as simulation, debug, coverage, formal, etc.
6. Experience working in a Unix/Linux environment.

ACADEMIC CREDENTIALS:
MS in EE/ECE/CE/CompSci. Prior Coop, or RA experience with some relevant work experience on CPU design verification.

LOCATION:
Santa Clara, CA

Qualifications:
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to ancestry, marital status, medical condition, mental or physical disability, political and/or third-party affiliation, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.#J-18808-Ljbffr