Synopsys is uniquely positioned to offer the most complete verification solution in market today. ZeBu is the emulation platform of Synopsys verification flow, it’s the industry’s performance & capacity leader in Emulation.
As an Application Engineer for emulation, the candidate will be primarily responsible for the successful deployment and evaluation of Synopsys emulation solution. He/She will closely work with customers, Sales, Marketing and R&D teams to resolve complex technical issues, presales evaluations, post-sales support, and develop collaterals.
The candidate will help analyze and resolve complex design verification and software validation issues for customers' cutting-edge ASIC/SoC designs. The position offers a great opportunity to grow by learning state-of-art verification flows from Synopsys.
Requirements:
- 5+ years of IC design/verification/emulation/FPGA prototyping experience.
- Good knowledge of ASIC design verification methodologies.
- Proficient with HDLs (Verilog/VHDL).
- HVLs SystemVerilog, C/C++ is desirable.
- Good understanding of ASIC design/verification flows.
- Good communication skills are required.
The Salary Range for this position is $154,000-$230,000.
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