35063 Jobs Found for Gate Energy
Job Description 5 to 6 years of GG implementation experience (Mid Level) - Oracle to Oracle - SQL server to Oracle - Oracle to SQL server - Oracle to Cloud - Any other db to any other DB - Oracle DBA/development experience (Mid – Senior) - Informatica/ETL exposure – Good to Have; Nice to know - Exadata or any MPP experience
Job Description 5 to 6 years of GG implementation experience (Mid Level) - Oracle to Oracle - SQL server to Oracle - Oracle to SQL server - Oracle to Cloud - Any other db to any other DB - Oracle DBA/development experience (Mid – Senior) - Informatica/ETL exposure – Good to Have; Nice to know - Exadata or any MPP experience
Job Title: FPGA Engineer Location: Cedar Rapids, IA (5 days onsite) Duration: Fulltime NOTE: Ability to obtain a security clearance is required. Experience range - 6-15 years Description: • Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration • Recommend new tools and...
ONSITE WORK ACTIVE SECRET CLEARANCE ***Keys VHDL and FPGA design/debug Xilinx FPGA / Vivado Develop architectures for implementation of high throughput complex designs involving Cryptographic Algorithms (VHDL) with high speed protocols NVMe, PCIe/SRIOV, 10G-400G Ethernet, TCP/IP, and IP development/integration targeting ARM SOC FPGAs (Ex. Xilinx...
ASIC & FPGA Design Engineer Orlando, FL Required Active Security Clearance Summary We are seeking for an experience FPGA design and verification engineer, candidate must have both design and verification experience including hardware integration. These are backfill position to pick up existing tasking from another FPGA engineer which require ca...
Job Title: FPGA Engineer NOTE: Due to nature of the project, U.S. Citizenship and the ability to obtain a security clearance is required. Resource work onsite from day one at Cedar Rapids, IA (5 days onsite) Experience range - 6-15 years • Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification...
Job Description Duties: • Contribute to the development of efficient µArchitectures and contribute to ASIC digital µArchitecture, design and verification • IPs integration • Understand Design for Verification concepts • Drive the top-level µArchitecture definition and develop the necessary RTL • Drive the chip-level integration, verification ...
Job Title: FPGA Engineer Location: Cedar Rapids, IA (5 days onsite) Duration: Fulltime NOTE: Ability to obtain a security clearance is required. Experience range - 6-15 years Description: • Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration • Recommend new tools and...
ASIC & FPGA Design Engineer Orlando, FL Required Active Security Clearance Summary We are seeking for an experience FPGA design and verification engineer, candidate must have both design and verification experience including hardware integration. These are backfill position to pick up existing tasking from another FPGA engineer which require ca...
ONSITE WORK ACTIVE SECRET CLEARANCE ***Keys VHDL and FPGA design/debug Xilinx FPGA / Vivado Develop architectures for implementation of high throughput complex designs involving Cryptographic Algorithms (VHDL) with high speed protocols NVMe, PCIe/SRIOV, 10G-400G Ethernet, TCP/IP, and IP development/integration targeting ARM SOC FPGAs (Ex. Xilinx...