Sv Tech Systems Jobs October 2024

Responsibilities: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and r...

Provide design verification services for our PCIe/CXL Switch SoCs Responsibilities Test bench development using System Verilog and UVM Test plan and test case development Experience in developing SV Functional coverage models and SVA assertions and cover properties Regression setup and debug RTL level and gate level simulations working with desig...

ASIC Design Verification Engineer (PCIe/CXL Switch SoCs) San Jose, CAFull-time + BenefitsUS Citizen or US Permanent ResidentResponsibilities: • Test bench development using SystemVerilog and UVM• Test plan and test case development • Experience in developing SV Functional coverage models and SVA assertions and cover properties• Regression setup and...

Provide design verification services for our PCIe/CXL Switch SoCs ​ Responsibilities Test bench development using System Verilog and UVM Test plan and test case development Experience in developing SV Functional coverage models and SVA assertions and cover properties Regression setup and debug RTL level and gate level simulations working with des...

ASIC Design Verification Engineer (PCIe/CXL Switch SoCs) Full-time San Jose, CA US Citizen or US Permanent Resident Responsibilities: Test bench development using SystemVerilog and UVM Test plan and test case development Experience in developing SV Functional coverage models and SVA assertions and cover properties Regression setup and debug RTL l...

Title: Design Verification Engineer Location: Mountain View, California Duration: 12+ Months Experience: 10+ Years Note: Team is seeking a Design Verification candidate with Strong PCIe expertise along with complex SoC debug. What You’ll Be Doing: At least 10+ years of experience in System Verilog HVL and C/C++. At least 10+ years of experienc...

Position: CPU RTL Design Engineer, Location: San Jose, CA (Onsite/Remote) Job Description: Design and develop IP's, Subsystems, SOC integration. Develop CPU subsystem front-end designs, emphasizing on microarchitecture and RTL design for the next generation CPU. Microarchitecture development and specification - From early high-level architectura...

Title: Design Verification Engineer Location: Mountain View, California Experience: 10+ Years Note: Team is seeking a Design Verification candidate with Strong PCIe expertise along-with complex SoC debug is must. What You’ll Be Doing: At-least 10+ years of experience in System Verilog HVL and C/C++. At least 10+ year of experience in SV/UVM...

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Please do not apply if you don't meet the minimum experience. We are a diversified growing company with a wide spectrum of project types, hiring in CA, AZ, TN, and PA. We offer top pay, growth opportunities, and industry-leading fringe benefits including healthcare, vision, life insurance, PTO, 401K/Match, and profit sharing. Minimum Qualifications...