10683 Jobs Found for Gate 39 Media
The role is Design for Test (DFT) for high-performance designs going into industry leading AI/ML architectures. The person coming into this role will be involved in all implementation aspects from RTL to tapeout for various IPs on the chip. High level challenges include reducing test cost while attaining high coverage, and facilitating debug and yi...
It's more than a career, it's a calling. MO-SSM Health Saint Louis University Hospital 1201 Grand Worker Type: Regular Job Summary: Supervises and provides guidance to staff in plant operations and maintenance for a department within a business unit or specific ministry location with limited authority in det...
The role is Design for Test (DFT) for high-performance designs going into industry leading AI/ML architectures. The person coming into this role will be involved in all implementation aspects from RTL to tapeout for various IPs on the chip. High level challenges include reducing test cost while attaining high coverage, and facilitating debug and yi...
The role is Design for Test (DFT) for high-performance designs going into industry leading AI/ML architectures. The person coming into this role will be involved in all implementation aspects from RTL to tapeout for various IPs on the chip. High level challenges include reducing test cost while attaining high coverage, and facilitating debug and yi...
The role is Design for Test (DFT) for high-performance designs going into industry leading AI/ML architectures. The person coming into this role will be involved in all implementation aspects from RTL to tapeout for various IPs on the chip. High level challenges include reducing test cost while attaining high coverage, and facilitating debug and yi...
Qualifications: 1. Fluent in system verilog real number modeling 2. Familiarity with writing regression tests for analog behavioral model verification 3. Familiarity with generating randomized vectors for analog behavioral model verification 4. Familiar with developing checker & writing assertions. 5. Good communication skills 6. Good debug skills...
· Working on full chip verification and OVM/UVM Methodology. System Verilog is a must with 2+ years of recent work experience. · Worked on passing test cases, test benches, and building environment. · Knowledge of functional coverage using HVL language features or assertions is a plus. · Good knowledge of gate level simulations . · Should be ARM-ba...
Requisition Number: 19473Required Travel: 0 - 10%Employment Type: Full Time/Salaried/ExemptSecurity Clearance: Ability to ObtainLevel of Experience: SeniorThis opportunity resides with Cyber & Electronic Warfare, a business group within HII’s Mission Technologies division. HII works within our nation’s intelligence and cyber operations communities ...
Requisition Number: 19472Required Travel: 0 - 10%Employment Type: Full Time/Salaried/ExemptSecurity Clearance: Ability to ObtainLevel of Experience: SeniorThis opportunity resides with Cyber & Electronic Warfare, a business group within HII’s Mission Technologies division. HII works within our nation’s intelligence and cyber operations communities ...
Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power. Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. Run Formal Verification checks between RTL and Gate level netlist and debug the aborts, inconclusive...