121 Jobs Found for Gate Sentry in Santa Clara
Oracle DBA with Golden Gate and AWS Austin, TX or Sunnyvale, CA onsite Contract Role Description: Oracle DBA with Golden Gate and AWS Experience working in Production and Dev systems Oracle Systems.- Specialized in Golden Gate Bidirectional setup including deep dived troubleshooting.( 19c and 12c )- Oracle 11g/12/19c Rel1, Rel 2 administration...
About Client: The Client is a leading global IT services and consulting company, providing a wide range of services to clients in various industries, including banking, financial services, retail, manufacturing, healthcare, and more. It is one of the largest employers in the IT industry and has a vast and diverse workforce. The company places a st...
Summary Posted: Aug 13, 2024 Weekly Hours: 40 Role Number: 200562684 Our teams build the internal software applications used daily by the people who create the Apple products you know and love. Come join a passionate and skilled group of developers, designers, and product folks that care deeply about our users and the work they do. Description ...
6 to 10 years of experience in DV. Testbench development – System Verilog Universal Methodology (“UVM”), Python, and C tests Integration/development of C tests/Application Programming Interface (“APIs”) and software build flow. Integration of UVM testbenches. Test development and debug, including without limitation tests for functionality, power, p...
Senior Physical Design Engineer
Posted 19 Sep 2024Job Description: Responsible for doing all aspects of SOC Physical Design implementation. For this position, the candidate will be representing Synopsys under our Design Services organization working on physical design implementation for SOC programs our customers have contracted to Synopsys. Some programs can be working with Synopsys team members ...
Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organiz...
Qualifications: 1. Fluent in system verilog real number modeling 2. Familiarity with writing regression tests for analog behavioral model verification 3. Familiarity with generating randomized vectors for analog behavioral model verification 4. Familiar with developing checker & writing assertions. 5. Good communication skills 6. Good debug skills...
The role is Design for Test (DFT) for high-performance designs going into industry leading AI/ML architectures. The person coming into this role will be involved in all implementation aspects from RTL to tapeout for various IPs on the chip. High level challenges include reducing test cost while attaining high coverage, and facilitating debug and yi...
Responsibilities: Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power. Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. Run Formal Verification checks between RTL and Gate level netlist and debug the aborts, inconclusive...
Minimum Requirements: Requires Bachelor’s degree or its equivalent in the field(s) of Electronics and Telecommunications or related field. Location: Calsoft Labs Inc., d/b/a ACL Digital - 2890 Zanker Road, Suite 200, San Jose, CA 95134 Experience: BS 5 + years Knowledge of verification methodology involving OOPs concepts C++, OVM/UVM. Design and ...